512k x 32 static ram module cym1846 cypress semiconductor corporation ? 3901 north first street san jose ca 95134 408-943-2600 december 1994 - revised october 10, 1997 84 6 features ? high-density 16-megabit sram module 32-bit standard footprint supports from 16kx32 through 1mx32 high-speed srams ? access time of 12 ns low active power ? 4.4w (max.) at 12 ns compatible with cym1821, cym1831, cym1836, cym1841, and cym1851 jedec modules available in 72-pin zip or simm/angled simm functional description the cym1846 is a high-performance 16-megabit static ram module organized as 512k words by 32 bits. this module is constructed from four 512k x 8 srams in soj packages mounted on an epoxy laminate substrate. four chip selects are used to independently enable the four bytes. reading or writ- ing can be executed on individual bytes or any combination of multiple bytes through proper use of the chip selects. the cym1846 is designed for use with standard 72-pin simm socket and zip footprint. the pinout is compatible with the 64-pin jedec zip/simm module family (cym1821, cym1831, cym1836, and cym1841) and the 72-pin cym1851. thus, a single motherboard design can be used to accommodate memory depth ranging from 16k words (cym1821) to 1024k words (cym1851). the standard simm can be used in angled simm sockets and is available with either tin-lead or 10 micro-inches of gold flash on the edge contacts. presence detect pins (pd 0 ? pd 3 ) are used to identify module memory density in applications where modules with alternate word depths can be interchanged. logic block diagram pin configuration a 0 ?a 18 1846?1 oe i/o 0 ?i/o 7 cs 3 cs 1 19 8 8 8 8 cs 2 cs 4 i/o 8 ?i/o 15 i/o 16 ?i/o 23 i/o 24 ?i/o 31 pd 0 ?open pd 1 ?open pd 2 ?gnd pd 3 ?open we 512kx8 sram 512kx8 sram 512kx8 sram 512kx8 sram zip/simm top view nc a 4 pd 3 pd 2 pd 0 gnd i/o 0 pd 1 i/o 1 i/o 8 i/o 2 i/o 9 i/o 3 v cc a 7 i/o 11 i/o 10 a 0 i/o 6 gnd nc a 15 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 i/o 7 we a 8 a 9 i/o 4 i/o 5 a 14 cs 1 cs 3 a 16 gnd i/o 16 i/o 17 a 12 a 13 i/o 20 i/o 21 i/o 22 i/o 14 i/o 15 a 1 a 2 i/o 12 i/o 13 cs 2 i/o 18 i/o 19 a 10 a 11 cs 4 a 17 oe i/o 24 i/o 25 v cc a 6 i/o 28 i/o 29 i/o 26 i/o 27 a 3 a 5 66 68 70 65 67 69 i/o 23 gnd i/o 30 i/o 31 a 18 72 71 nc nc nc
cym1846 2 maximum ratings (above which the useful life may be impaired. for user guide- lines, not tested.) storage temperature ................................. ? 55 c to +125 c ambient temperature with power applied ............................................... ? 10 c to +85 c supply voltage to ground potential ............... ? 0.5v to +7.0v dc voltage applied to outputs in high z state ................................................ ? 0.5v to +v cc dc input voltage ............................................ ? 0.5v to +7.0v selection guide 1846 ? 12 1846 ? 15 1846 ? 20 1846 ? 25 1846 ? 35 maximum access time (ns) 12 15 20 25 35 maximum operating current (ma) 800 800 800 800 800 maximum standby current (ma) 240 240 240 240 240 shaded area contains preliminary information. operating range range ambient temperature v cc commercial 0 c to +70 c 5v 10% electrical characteristics over the operating range parameter description test conditions min. max. unit v oh output high voltage v cc = min., i oh = ? 4.0 ma 2.4 v v ol output low voltage v cc = min., i ol = 8.0 ma 0.4 v v ih input high voltage 2.2 v cc + 0.3 v v il input low voltage ? 0.5 0.8 v i ix input load current gnd v i v cc ? 10 +10 a i oz output leakage current gnd v o v cc , output disabled ? 10 +10 a i cc v cc operating supply current v cc = max., i out = 0 ma, cs n v il 800 ma i sb1 automatic cs power-down current [1] max. v cc , cs v ih , min. duty cycle = 100% 240 ma i sb2 automatic cs power-down current [1] max. v cc , cs v cc ? 0.2v, v in v cc ? 0.2v, or v in 0.2v ? 20, ? 25, 35 40 ma ? 12, ? 15 120 ma capacitance [2] parameter description test conditions max. unit c ina input capacitance (we , oe , a 0 ? 18 )t a = 25 c, f = 1 mhz, v cc = 5.0v 40 pf c inb input capacitance (cs )20pf c out output capacitance 20 pf note: 1. a pull-up resistor to v cc on the cs input is required to keep the device deselected during v cc power-up, otherwise i sb will exceed values given. 2. tested on a sample basis.
cym1846 3 ac test loads and waveforms 1846 ? 2 1846 ? 3 90% 10% 3.0v gnd 90% 10% all input pulses 5v output 30 pf including jig and scope 5v output 5 pf including jig and scope (a) (b) 5ns 5 ns output r1 481 ? r1 481 ? r2 255 ? r2 255 ? 167 ? equivalent to: th venin equivalent 1.73v switching characteristics over the operating range [3] 1846 ? 12 1846 ? 15 parameter description min. max. min. max. unit read cycle t rc read cycle time 12 15 ns t aa address to data valid 12 15 ns t oha data hold from address change 3 3 ns t acs cs low to data valid 12 15 ns t doe oe low to data valid 7 8ns t lzoe oe low to low z 0 0 ns t hzoe oe high to high z 7 8ns t lzcs cs low to low z [4] 3 3 ns t hzcs cs high to high z [4, 5] 7 8ns t pd cs high to power-down 12 15 ns write cycle [6] t wc write cycle time 12 15 ns t scs cs low to write end 9 10 ns t aw address set-up to write end 9 10 ns t ha address hold from write end 0 0 ns t sa address set-up to write start 1 1 ns t pwe we pulse width 10 12 ns t sd data set-up to write end 7 8 ns t hd data hold from write end 1 1 ns t lzwe we high to low z 3 3 ns t hzwe we low to high z [5] 0 7 0 8ns shaded area contains preliminary information.
cym1846 4
cym1846 5 switching characteristics over the operating range [3] (continued) 1846 ? 20 1846 ? 25 1846 ? 35 parameter description min. max. min. max. min. max. unit read cycle t rc read cycle time 20 25 35 ns t aa address to data valid 20 25 35 ns t oha data hold from address change 3 3 3 ns t acs cs low to data valid 20 25 35 ns t doe oe low to data valid 10 15 25 ns t lzoe oe low to low z 0 0 0 ns t hzoe oe high to high z 10 12 12 ns t lzcs cs low to low z [4] 333ns t hzcs cs high to high z [4, 5] 10 12 12 ns t pd cs high to power-down 20 25 35 ns write cycle [6] t wc write cycle time 20 25 35 ns t scs cs low to write end 152030ns t aw address set-up to write end 15 20 30 ns t ha address hold from write end 0 0 0 ns t sa address set-up to write start 1 2 2 ns t pwe we pulse width 152030ns t sd data set-up to write end 10 15 20 ns t hd data hold from write end 1 2 2 ns t lzwe we high to low z 3 4 5 ns t hzwe we low to high z [6] 010012012ns notes: 3. test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5v, input pulse levels of 0 to 3 .0v, and output loading of the specified i ol /i oh and 30-pf load capacitance. 4. at any given temperature and voltage condition, t hzcs is less than t lzcs for any given device. these parameters are guaranteed and not 100% tested. 5. t hzcs and t hzwe are specified with c l = 5 pf as in part (b) of ac test loads and waveforms. transition is measured 500 mv from steady-state voltage. 6. the internal write time of the memory is defined by the overlap of cs low and we low. both signals must be low to initiate a write and either signal can terminate a write by going high. the data input set-up and hold timing should be referenced to the rising edge of the signal th at terminates the write.
cym1846 6 switching waveforms read cycle no. 1 [7, 8] read cycle no. 2 [7, 9] write cycle no. 1 (we controlled) [6] notes: 7. we is high for read cycle. 8. device is continuously selected, cs = v il , and oe = v il . 9. address valid prior to or coincident with cs transition low. previous data valid data valid t rc t aa t oha 1846 ? 4 address data out data valid t rc t acs t doe t lzoe t lzcs high impedance t hzoe t hzcs high impedance 1846 ? 5 data out oe cs v cc supply current 50% 50% t pu icc isb t pd t wc data valid data undefined high impedance t scs t aw t sa t pwe t ha t hd t hzwe t lzwe t sd cs we 1846 ? 6 address data in data out
cym1846 ? cypress semiconductor corporation, 1997. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do ing so indemnifies cypress semiconductor against all charges. note: 10. if cs goes high simultaneously with we high, the output remains in a high-impedance state. switching waveforms (continued) t wc data valid data undefined high impedance t scs t aw t sa t pwe t ha t hd t hzwe t lzwe t sd cs we address datain data out write cycle no. 2 (cs controlled) [6, 10] truth table cs we oe inputs/output mode h x x high z deselect/power-down l h l data out read l l x data in write l h h high z deselect ordering information speed (ns) ordering code package type package type operating range 12 cym1846pm ? 12c pm21 72-pin plastic simm module commercial cym1846p8 ? 12c pm21 72-pin plastic simm module (gold contacts) cym1846pz ? 12c pz11 72-pin plastic zip module 15 cym1846pm ? 15c pm21 72-pin plastic simm module commercial cym1846p8 ? 15c pm21 72-pin plastic simm module (gold contacts) cym1846pz ? 15c pz11 72-pin plastic zip module 20 cym1846pm ? 20c pm21 72-pin plastic simm module commercial cym1846p8 ? 20c pm21 72-pin plastic simm module (gold contacts) cym1846pz ? 20c pz11 72-pin plastic zip module 25 cym1846pm ? 25c pm21 72-pin plastic simm module commercial cym1846p8 ? 25c pm21 72-pin plastic simm module (gold contacts) cym1846pz ? 25c pz11 72-pin plastic zip module 35 cym1846pm ? 35c pm21 72-pin plastic simm module commercial cym1846p8 ? 35c pm21 72-pin plastic simm module (gold contacts) cym1846pz ? 35c pz11 72-pin plastic zip module
cym1846 8 shaded area contains preliminary information. document #: 38 ? m ? 00073 ? b ordering information speed (ns) ordering code package type package type operating range package diagrams 72-pin plastic simm module pm21 72-pin plastic zip module pz11
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